MC9S12P128 Datasheet, PDF (66/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12PPIMV1)
Table 2-8. PORTE Register Field Descriptions (continued)
Field
4
PE
1
PE
0
PE
Description
Port E general purpose input/output data—Data Register, ECLK output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The ECLK output function takes precedence over the general purpose I/O function if enabled.
Port E general purpose input data and interrupt—Data Register, IRQ input.
This pin can be used as general purpose and IRQ input.
Port E general purpose input data and interrupt—Data Register, XIRQ input.
This pin can be used as general purpose and XIRQ input.
2.3.9 Port E Data Direction Register (DDRE)
Address 0x0009
R
W
Reset
7
DDRE7
0
1. Read: Anytime
Write: Anytime
6
DDRE6
5
DDRE5
4
DDRE4
3
DDRE3
2
DDRE2
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-7. Port E Data Direction Register (DDRE)
Table 2-9. DDRE Register Field Descriptions
Field
7-2
DDRE
Description
Port E Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin is configured as output
0 Associated pin is configured as input
Access: User read/write⁽¹⁾
1
0
0
0
0
0
S12P-Family Reference Manual, Rev. 1.12
66
Freescale Semiconductor