MC9S12P128 Datasheet, PDF (64/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12PPIMV1)
2.3.5 Port A Data Direction Register (DDRA)
Address 0x0002
R
W
Reset
7
DDRA7
0
1. Read: Anytime
Write: Anytime
6
DDRA6
5
DDRA5
4
DDRA4
3
DDRA3
2
DDRA2
0
0
0
0
0
Figure 2-3. Port A Data Direction Register (DDRA)
Table 2-6. DDRA Register Field Descriptions
Field
7-0
DDRA
Description
Port A Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin is configured as output
0 Associated pin is configured as input
2.3.6 Port B Data Direction Register (DDRB)
Address 0x0003
R
W
Reset
7
DDRB7
0
1. Read: Anytime
Write: Anytime
6
DDRB6
5
DDRB5
4
DDRB4
3
DDRB3
2
DDRB2
0
0
0
0
0
Figure 2-4. Port B Data Direction Register (DDRB)
Table 2-7. DDRB Register Field Descriptions
Field
7-0
DDRB
Description
Port B Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin is configured as output
0 Associated pin is configured as input
Access: User read/write⁽¹⁾
1
0
DDRA1
DDRA0
0
0
Access: User read/write⁽¹⁾
1
0
DDRB1
DDRB0
0
0
S12P-Family Reference Manual, Rev. 1.12
64
Freescale Semiconductor