MC9S12P128 Datasheet, PDF (208/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
Read: Anytime
Write: If PLLSEL=1 write anytime, else write has no effect.
If PLL is locked (LOCK=1)
f _PLL = ₍---_P----_O-----_S-^f--_T-^V---_D-^C----_I-^O-_V------₊-----₁---₎
If PLL is not locked (LOCK=0) f _PLL = ^f---^V----₄-^C----^O---
If PLL is selected (PLLSEL=1) f _bus = ^f---^P---₂-^L---^L--
7.3.2.4 S12CPMU Flags Register (CPMUFLG)
This register provides S12CPMU status bits and flags.
0x0037
7
R
RTIF
W
6
PORF
5
LVRF
4
LOCKIF
3
LOCK
2
ILAF
1
OSCIF
0
UPOSC
Reset
0
Note 1
Note 2
0
0
Note 3
0
0
1. PORF is set to 1 when a power on reset occurs. Unaffected by System Reset.
2. LVRF is set to 1 when a low voltage reset occurs. Unaffected by System Reset. Set by power on reset.
3. ILAF is set to 1 when an illegal address reset occurs. Unaffected by System Reset. Cleared by power on reset.
= Unimplemented or Reserved
Figure 7-7. S12CPMU Flags Register (CPMUFLG)
Read: Anytime
Write: Refer to each bit for individual write conditions
Table 7-3. CPMUFLG Field Descriptions
Field
7
RTIF
6
PORF
Description
Real Time Interrupt Flag — RTIF is set to 1 at the end of the RTI period. This flag can only be cleared by writing
a 1. Writing a 0 has no effect. If enabled (RTIE=1), RTIF causes an interrupt request.
0 RTI time-out has not yet occurred.
1 RTI time-out has occurred.
Power on Reset Flag — PORF is set to 1 when a power on reset occurs. This flag can only be cleared by writing
a 1. Writing a 0 has no effect.
0 Power on reset has not occurred.
1 Power on reset has occurred.
S12P-Family Reference Manual, Rev. 1.12
208
Freescale Semiconductor