MC9S12P128 Datasheet, PDF (307/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Analog-to-Digital Converter (ADC12B10CRev 00.05) Block Description
Address Name
R
0x0003 ATDCTL3
W
R
0x0004 ATDCTL4 _W
R
0x0005 ATDCTL5
W
R
0x0006 ATDSTAT0
W
0x0007
Unimple- R
mented W
R
0x0008 ATDCMPEH _W
R
0x0009 ATDCMPEL _W
R
0x000A ATDSTAT2H
W
R
0x000B ATDSTAT2L
W
R
0x000C ATDDIENH _W
R
0x000D ATDDIENL
W
R
0x000E ATDCMPHTH _W
R
0x000F ATDCMPHTL
W
0x0010
R
ATDDR0
W
0x0012
ATDDR1 ^R
W
0x0014
R
ATDDR2
W
0x0016
R
ATDDR3 _W
0x0018
R
ATDDR4
W
0x001A
R
ATDDR5
W
0x001C
R
ATDDR6
W
0x001E
R
ATDDR7
W
Bit 7
DJM
SMP2
0
SCF
0
0
0
0
0
6
5
4
3
2
1
Bit 0
S8C
S4C
S2C
S1C
FIFO
FRZ1
FRZ0
SMP1 SMP0
PRS[4:0]
SC
SCAN MULT
CD
0
CC3
ETORF FIFOR
0
0
0
0
CC
CC2
0
CB
CC1
0
CA
CC0
0
0
0
0
0
0
CMPE[9:8]
CMPE[7:0]
0
0
0
0
0
CCF[9:8]
CCF[7:0]
0
0
0
0
0
IEN[9:8]
IEN[7:0]
0
0
0
0
0
CMPHT[9:8]
CMPHT[7:0]
See Section 9.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 9.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 9.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 9.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 9.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 9.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 9.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 9.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 9.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 9.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 9.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 9.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 9.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 9.3.2.12.2, “Right Justified Result Data (DJM=1)”
See Section 9.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 9.3.2.12.2, “Right Justified Result Data (DJM=1)”
= Unimplemented or Reserved
Figure 9-2. ADC12B10C Register Summary (Sheet 2 of 3)
S12P-Family Reference Manual, Rev. 1.12
Freescale Semiconductor
307