MC9S12P128 Datasheet, PDF (37/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Table 1-8. Pin-Out Summary⁽¹⁾
Package Pin
QFP
80
LQFP
64
QFN
48
Function
Power
Supply
Pin
2nd
Func.
3rd
Func.
Internal Pull
Resistor
CTRL
Reset
State
Description
71
56
42
PM4
MOSI
—
VDDX PERM/PPSM Disabled Port M I/O, MOSI of SPI
72
57
43
PM3
SS
—
VDDX PERM/PPSM Disabled Port M I/O, SCK of SPI
73
58
44
PM2
MISO
—
VDDX PERM/PPSM Disabled Port M I/O, SS of SPI0
74
59
45
PM1
TXCAN
VDDX PERM/PPSM Disabled Port M I/O, TX of CAN
75
60
46
PM0
RXCAN
VDDX PERM/PPSM Disabled Port M I/O, RX of CAN
76
61
47
VSSX1
—
—
—
—
—
—
77
62
48
VDDX1
—
—
—
—
—
—
78
63
-
PP7
KWP7
VDDX PERP/PPSP Disabled Port P I/O, interrupt
79
64
-
PP5
KWP5 PWM5 VDDX PERP/PPSP Disabled Port P I/O, interrupt,
PWM channel
80
-
-
PP4
KWP4 PWM4 VDDX PERP/PPSP
1. Table shows a superset of pin functions. Not all functions are available on all derivatives
2. VRH and VDDA share single pin on 48 pin package option
3. VRL and VSSA share single pin on 64 and 48 pin package option
Disabled
Port P I/O, interrupt,
PWM channel
NOTE
For devices assembled in 48-pin and 64-pin packages all non-bonded out pins should be configured as
outputs after reset in order to avoid current drawn from floating inputs. Refer to Table 1-8 for affected
pins.