MC9S12P128 Datasheet, PDF (78/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Port Integration Module (S12PPIMV1)
1. Read: Anytime
Write:Never, writes to this register have no effect.
Field
3-0
PTIS
Table 2-22. PTIS Register Field Descriptions
Description
Port S input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
2.3.26 Port S Data Direction Register (DDRS)
Address 0x024A
7
R
0
W
Reset
0
1. Read: Anytime
Write: Anytime
6
5
4
3
2
0
0
0
DDRS3
DDRS2
0
0
0
0
0
Figure 2-24. Port S Data Direction Register (DDRS)
Access: User read/write⁽¹⁾
1
0
DDRS1
DDRS0
0
0
Table 2-23. DDRS Register Field Descriptions
Field
Description
3-2 Port S data direction—
DDRS This bit determines whether the associated pin is an input or output.
1
DDRS
1 Associated pin is configured as output
0 Associated pin is configured as input
Port S data direction—
This bit determines whether the associated pin is an input or output.
Depending on the configuration of the enabled SCI the I/O state will be forced to be input or output. In this case the
data direction bit will not change.
0
DDRS
1 Associated pin is configured as output
0 Associated pin is configured as input
Port S data direction—
This bit determines whether the associated pin is an input or output.
Depending on the configuration of the enabled SCI the I/O state will be forced to be input or output. In this case the
data direction bit will not change.
1 Associated pin is configured as output
0 Associated pin is configured as input
S12P-Family Reference Manual, Rev. 1.12
78
Freescale Semiconductor