MC9S12P128 Datasheet, PDF (471/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Chapter 14
Timer Module (TIM16B8CV2) Block Description
Table 14-1. Revision History
Revision
Number
Revision Date
Sections
Affected
Description of Changes
V02.00
V02.01
V02.02
V02.03
V02.04
15 Nov 2005
03 Aug 2006
03 Apr 2007
14 Sep 2007
1 Jul 2008
14.3.2/14-476 - Moved OCPD from offset $2F to $2C.
14.3.2.3/14-479 - Updated OC7 diagram, memory map, and regsiter description location for
OCPD
14.3.2/14-476 - Replaced TPORTE with OCPD in page 8, and added descriptionof OCPD
- Removed redundant memory map table
- Replaced typo OPCD with OCPD
14.3.2.12/14-
486
14.3.2.13/14-
486
14.3.2.16/14-
489
14.4.2/14-494
14.4.3/14-494
- Revised flag clearing procedure, whereby TEN bit must be set when clearing
flags.
14.1 Introduction
The basic timer consists of a 16-bit, software-programmable counter driven by a enhanced programmable
prescaler.
This timer can be used for many purposes, including input waveform measurements while simultaneously
generating an output waveform. Pulse widths can vary from microseconds to many seconds.
This timer contains 8 complete input capture/output compare channels and one pulse accumulator. The
input capture function is used to detect a selected transition edge and record the time. The output compare
function is used for generating output signals or for timer software delays. The 16-bit pulse accumulator
is used to operate as a simple event counter or a gated time accumulator. The pulse accumulator shares
timer channel 7 when in event mode.
A full access for the counter registers or the input capture/output compare registers should take place in
one clock cycle. Accessing high byte and low byte separately for all of these registers may not yield the
same result as accessing them in one word.
14.1.1 Features
The TIM16B8CV2 includes these distinctive features:
S12P-Family Reference Manual, Rev. 1.12
Freescale Semiconductor
471