MC9S12P128 Datasheet, PDF (243/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
7.6.1.6 Autonomous Periodical Interrupt (API)
The API sub-block can generate periodical interrupts independent of the clock source of the MCU. To
enable the timer, the bit APIFE needs to be set.
The API timer is either clocked by a trimmable internal RC oscillator (ACLK) or the Bus Clock. Timer
operation will freeze when MCU clock source is selected and Bus Clock is turned off. The clock source
can be selected with bit APICLK. APICLK can only be written when APIFE is not set.
The APIR[15:0] bits determine the interrupt period. APIR[15:0] can only be written when APIFE is
cleared. As soon as APIFE is set, the timer starts running for the period selected by APIR[15:0] bits. When
the configured time has elapsed, the flag APIF is set. An interrupt, indicated by flag APIF = 1, is triggered
if interrupt enable bit APIE = 1. The timer is re-started automatically again after it has set APIF.
The procedure to change APICLK or APIR[15:0] is first to clear APIFE, then write to APICLK or
APIR[15:0], and afterwards set APIFE.
The API Trimming bits APITR[5:0] must be set so the minimum period equals 0.2 ms if stable frequency
is desired.
See Table 7-17 for the trimming effect of APITR.
NOTE
The first period after enabling the counter by APIFE might be reduced by
API start up delay t_sdel.
It is possible to generate with the API a waveform at the external pin API_EXTCLK by setting APIFE and
enabling the external access with setting APIEA.
7.7 Initialization/Application Information
S12P-Family Reference Manual, Rev. 1.12
Freescale Semiconductor
243