MC9S12P128 Datasheet, PDF(136/564 Page) Freescale Semiconductor, Inc – S12 Microcontrollers

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MC9S12P128 Datasheet, PDF (136/564 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

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Background Debug Module (S12SBDMV1)

â ENBDM should only be set via a BDM hardware command if the BDM ï¬rmware commands

are needed. (This does not apply in special single chip mode).

â BDMACT can only be set by BDM hardware upon entry into BDM. It can only be cleared by

the standard BDM ï¬rmware lookup table upon exit from BDM active mode.

â All other bits, while writable via BDM hardware or standard BDM ï¬rmware write commands,

should only be altered by the BDM hardware or standard ï¬rmware lookup table as part of BDM

command execution.

Table 5-2. BDMSTS Field Descriptions

Field

7

ENBDM

6

BDMACT

4

SDV

3

TRACE

1

UNSEC

Description

Enable BDM â This bit controls whether the BDM is enabled or disabled. When enabled, BDM can be made

active to allow ï¬rmware commands to be executed. When disabled, BDM cannot be made active but BDM

hardware commands are still allowed.

0 BDM disabled

1 BDM enabled

Note: ENBDM is set by the ï¬rmware out of reset in special single chip mode. In special single chip mode with

the device secured, this bit will not be set by the ï¬rmware until after the Flash erase verify tests are

complete.

BDM Active Status â This bit becomes set upon entering BDM. The standard BDM ï¬rmware lookup table is

then enabled and put into the memory map. BDMACT is cleared by a carefully timed store instruction in the

standard BDM ï¬rmware as part of the exit sequence to return to user code and remove the BDM memory from

the map.

0 BDM not active

1 BDM active

Shift Data Valid â This bit is set and cleared by the BDM hardware. It is set after data has been transmitted as

part of a ï¬rmware or hardware read command or after data has been received as part of a ï¬rmware or hardware

write command. It is cleared when the next BDM command has been received or BDM is exited. SDV is used

by the standard BDM ï¬rmware to control program ï¬ow execution.

0 Data phase of command not complete

1 Data phase of command is complete

TRACE1 BDM Firmware Command is Being Executed â This bit gets set when a BDM TRACE1 ï¬rmware

command is ï¬rst recognized. It will stay set until BDM ï¬rmware is exited by one of the following BDM commands:

GO or GO_UNTIL.

0 TRACE1 command is not being executed

1 TRACE1 command is being executed

Unsecure â If the device is secured this bit is only writable in special single chip mode from the BDM secure

ï¬rmware. It is in a zero state as secure mode is entered so that the secure BDM ï¬rmware lookup table is enabled

and put into the memory map overlapping the standard BDM ï¬rmware lookup table.

The secure BDM ï¬rmware lookup table veriï¬es that the on-chip Flash is erased. This being the case, the UNSEC

bit is set and the BDM program jumps to the start of the standard BDM ï¬rmware lookup table and the secure

BDM ï¬rmware lookup table is turned off. If the erase test fails, the UNSEC bit will not be asserted.

0 System is in a secured mode.

1 System is in a unsecured mode.

Note: When UNSEC is set, security is off and the user can change the state of the secure bits in the on-chip

Flash EEPROM. Note that if the user does not change the state of the bits to âunsecuredâ mode, the

system will be secured again when it is next taken out of reset.After reset this bit has no meaning or effect

when the security byte in the Flash EEPROM is conï¬gured for unsecure mode.

S12P-Family Reference Manual, Rev. 1.12

136

Freescale Semiconductor

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