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TLK3134_1 Datasheet, PDF (98/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver
TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
www.ti.com
• XAUI Based Continuous Random Test Pattern (CRPAT):
– Device Pin Setting(s):
• Ensure ST primary input pin is low.
• Ensure CODE primary input pin is low.
– Reset Device:
• Issue a hard or soft reset (RST_N asserted –or- Write 1 to 4/5.0.15)
– Select single ended or differential REFCLK input:
• If Single Ended REFCLK used - Write 2’b01 to 4/5.37120.15:14
• If Differential REFCLK used – Write 2’b00 to 4/5.37120.15:14
– Select SERDES TX Reference Clock Input:
• If Single Ended REFCLK used - Write 2’b10 to 4/5.37120.11:10
• If Differential REFCLK used – Write 2’b11 to 4/5.37120.11:10
– Select SERDES RX Reference Clock Input:
• If Single Ended REFCLK used - Write 2’b10 to 4/5.37120.9:8
• If Differential REFCLK used – Write 2’b11 to 4/5.37120.9:8
– Set XAUI mode:
• Write 1’b1 to 4/5.32809.15
– Ensure a legal reference clock operation frequency is selected based on Appendix A, and provision
control settings accordingly. It is also possible to use the Jitter Cleaner during these tests, and the
user should consult Appendix A for further Jitter Cleaner provisioning details.
– Issue Datapath Reset:
• Write 1’b1 to 4/5.32800.15
– Clear Counters:
• Read the test pattern error counters in the following order
– 4/5.32778
– 4/5.32779
– Enable Pattern Generation:
• Write 1’b1 to 4/5.32768.1
– Enable Pattern Verification:
• Write 1’b1 to 4/5.32769.1
– Poll Lane Align Status Asserted:
• Read 4/5.1.2, and discard value read.
• Poll 4/5.1.2 asserted
– Verify that the test pattern preamble has been received:
• Poll 4/5.32801.15 asserted
– The pattern verification is now in progress.
– Verify Error Free Operation (as many times as desired during the duration of the test period):
• Poll 4/5.1.2 asserted (Lane Align Status)
• Read 4/5.32778, and verify 16’h0000 is read to confirm error free operation.
• Read 4/5.32779, and verify 16’h0000 is read to confirm error free operation.
• XAUI Based Continuous Jitter Test Pattern (CJPAT):
– Follow the XAUI Based Continuous Random Test Pattern procedure above, with the following
exceptions:
• Write 1’b1 to 4/5.32768.0 instead of 4/5.32768.1.
• Write 1’b1 to 4/5.32769.0 instead of 4/5.32769.1.
• 10GFC Based Continuous Jitter Test Pattern (CJPAT):
– Follow the XAUI Based Continuous Random Test Pattern procedure above, with the following
98
Device Reset Requirements/Procedure
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