TLK3134_1 Datasheet, PDF (121/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

www.ti.com
TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
4.12 HSTL Output Switching Characteristics (SDR Timing Mode Only)
over operating free-air temperature range (unless otherwise noted)
T_duty
t_period
T_freq
T_pd
T_pd
PARAMETER
TEST CONDITIONS
RXCLK Duty Cycle
RXCLK Period
Rising and Falling Edge Aligned Data
Note: C_load = 10pF, using timing reference of VDDQ/2.
Rising and Falling Edge Aligned Data
RXCLK Frequency
Rising and Falling Edge Aligned Data
RXCLK rising to RXDATA valid.
RXCLK falling to RXDATA valid.
Rising Edge Aligned
Note: C_load = 10pF, using timing reference of VDDQ/2.
Falling Edge Aligned
Note: C_load = 10pF, using timing reference of VDDQ/2.
MIN
40%
2.67
60
–0.10 ×
t_period
–0.10 ×
t_period
MAX UNIT
60%
16.67
375
+0.10 ×
t_period
+0.10 ×
t_period
ns
MHz
ps
ps
RXCLK
t_PERIOD
V_OH(ac)
VDDQ/2
V_OL(ac)
T_PD
V_OH(ac)
RXDATA VDDQ/2
V_OL(ac)
Figure 4-7. HSTL (SDR Timing Mode Only) Rising Edge Aligned Output Timing Requirements
RXCLK
t_PERIOD
T_PD
V_OH(ac)
RXDATA VDDQ/2
V_OL(ac)
V_OH(ac)
VDDQ/2
V_OL(ac)
Figure 4-8. HSTL (SDR Timing Mode Only) Falling Edge Aligned Output Timing Requirements
Submit Documentation Feedback
Electrical Specifications 121