TLK3134_1 Datasheet, PDF (76/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
Table 2-107. SERDES_TEST_CONFIG_RX⁽¹⁾
ADDRESS: 0x9012
DEFAULT: 0x0000
BIT(s)
NAME
DESCRIPTION
4/5.36882.10:8 Reserved
Reserved for TI test.
4/5.36882.7:6 LOOPBACK_RX
00 = Disabled
01 = Pad loopback. For TI purposes only
10 = Inner loopback (CML driver disabled)
11 = Inner loopback (CML driver enabled)
4/5.36882.5:4 CLKBYPASS_RX
PLL Bypass control in test mode
00 = No bypass
01 = Reserved
10 = Functional bypass. Macros run using TESCLKR
11 = Refclk observe (Reserved. For TI purposes only)
4/5.36882.3
ENRXPATT_RX
0 – Disables test pattern verification in SERDES RX macro.
1 – Enables test pattern verification in SERDES RX macro.
4/5.36882.2
ENTXPATT_RX
0 – Disables test pattern generation in SERDES RX macro.
1 – Enables test pattern generation in SERDES RX macro.
4/5.36882.1:0 TESTPATT_RX
Valid when ENTXPATT_RX, ENRXPATT_RX, ENTEST_RX are set
00 = Reserved (Default)
01 = Clock pattern (Half baud clock pattern with period of 2UI)
10 = 2⁷ – 1 PRBS pattern
11 = 2²³ – 1 PRBS pattern
(1) Above control bits are only for vendor testing only. Customer should leave them at their default values
Table 2-108. SERDES_RX0_STATUS⁽¹⁾
BIT(s)
4/5.36883.3
4/5.36883.2
4/5.36883.1
4/5.36883.0
ADDRESS: 0x9013
DEFAULT: 0x0000
NAME
DESCRIPTION
LOSDTCT
When HIGH indicates Loss of Signal condition is detected for RX CH 0
ODDCG
LOW when SYNC is HIGH. After that toggles every cycle.
SYNC
When comma detection is enabled, this bit is HIGH when an aligned
comma is received.
RX CH 0 TESTFAIL
When HIGH, indicates an error occurred during test pattern verification
for SERDES RX CH 0.
When ST = 0, this bit status is valid when PRBS_EN pin is set or when
SERDES RX test pattern registers bits are set
When ST = 1, this bit status is valid only when SERDES RX test pattern
verification bits are set
(1) Above status bits are only for Receive CH 0.
Table 2-109. SERDES_RX1_STATUS⁽¹⁾
BIT(s)
4/5.36884.3
4/5.36884.2
4/5.36884.1
4/5.36884.0
ADDRESS: 0x9014
DEFAULT: 0x0000
NAME
DESCRIPTION
LOSDTCT
When HIGH indicates Loss of Signal condition is detected for RX CH 1
ODDCG
LOW when SYNC is HIGH. After that toggles every cycle.
SYNC
When comma detection is enabled, this bit is HIGH when an aligned
comma is received.
RX CH 1 TESTFAIL
When HIGH, indicates an error occurred during test pattern verification
for SERDES RX CH 1.
When ST = 0, this bit status is valid when PRBS_EN pin is set or when
SERDES RX test pattern registers bits are set
When ST = 1, this bit status is valid only when SERDES RX test pattern
verification bits are set
(1) Above status bits are only for Receive CH 1.
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ACCESS
RW
RW
RW
RW
RW
RW
ACCESS
RO
RO
RO
RO
ACCESS
RO
RO
RO
RO
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