TLK3134_1 Datasheet, PDF (51/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

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TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
MDC
MDIO
0
1
0
1
PA [4:0]
5 'h1 F
1
0
DATA
1
32 "1's"
Preamble
Start
Write
Code
PHY
REG
Turn
Addr
Addr
Around
Data
Idle
Figure 2-39. CL22 – Indirect Address Method – Data Write
Following timing diagrams illustrate an example read transaction to read contents of Register 16’h9000
using indirect addressing in Clause 22.
MDC
MDIO
0
1
0
1
PA [4:0]
5 'h1 E
1
0 16 'h9000
1
32 "1's"
Preamble
Start
Write
Code
PHY
REG
Turn
Addr
Addr
Around
Data
Idle
Figure 2-40. CL22 – Indirect Address Method – Address Write
MDC
MDIO
Pu1
0
1
1
0 ^{PA4 PA0}
5’h1F
0 D15 D0
1
32 "1's"
Turn
Read
PHY
REG
Around
Preamble
Start
Code
Addr
Addr
Data
Idle
Figure 2-41. CL22 – Indirect Address Method – Data Read
The IEEE 802.3 Clause 22/45 specification defines many of the registers, and additional registers have
been implemented for expanded functionality.
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Detailed Description
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