TLK3134_1 Datasheet, PDF (129/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

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A APPENDIX A – Frequency Ranges Supported
TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
The following tables show the details of REFCLK input frequency versus Jitter Cleaner PLL multiplier
value for each application TLK3134 supports.
If the desired serial bit rate is between 2.0 Gbps and 3.75 Gbps, full rate should be selected for the
RATE[1:0] bits for that channel.
If the desired serial bit rate is between 1.0 Gbps and 2.125 Gbps, half rate should be selected for the
RATE[1:0] bits for that channel.
If the desired serial bit rate is between 600 Mbps and 1.0625 Gbps, quarter rate should be selected for the
RATE[1:0] bits for that channel.
If the desired serial bit rate falls in the overlap between the full and half rate ranges defined above, then
either setting is appropriate.
If the desired serial bit rate falls in the overlap between the half and quarter rate ranges defined above,
then either setting is appropriate.
In general, there are many different settings that will yield the same serial bit rate. It should be noted that
selecting the setting with the highest SERDES REFCLK and the lowest SERDES PLL Multiplier will give
the best serial performance.
XAUI Mode - Legal Clocking Mode Settings
TLK3134 Jitter SERDES SERDES Serial Data Rate = f(SPEED[1:0]) (Mbps)
REFCLK Cleaner REFCLK PLL Full (00) Half (01) Qrtr. (10)
Input (MHz) Multiplier Input (MHz) Multiplier
78.12500 OFF 78.12500
20 3125.000 1562.500 781.250
78.12500 0.25 19.53125
78.12500
0.5
39.06250
78.12500
1
78.12500
20 3125.000 1562.500 781.250
78.12500
2
156.25000 10 3125.000 1562.500 781.250
156.25000 OFF 156.25000 10 3125.000 1562.500 781.250
156.25000 0.25 39.06250
156.25000 0.5
78.12500
20 3125.000 1562.500 781.250
156.25000
1
156.25000 10 3125.000 1562.500 781.250
156.25000
2
312.50000
5
3125.000 1562.500 781.250
312.50000 OFF 312.50000
5
3125.000 1562.500 781.250
312.50000 0.25 78.12500
20 3125.000 1562.500 781.250
312.50000 0.5 156.25000 10 3125.000 1562.500 781.250
312.50000
1
312.50000
5
3125.000 1562.500 781.250
312.50000
2
625.00000
Figure A-1. Reference Clock Selection – XAUI – 10 GbE Mode
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APPENDIX A – Frequency Ranges Supported 129