TLK3134_1 Datasheet, PDF (22/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
www.ti.com
2.7 Parallel Interface Modes - Detailed Description
The TLK3134 has several parallel interface modes. The major parallel interface modes of operation are
presented below:
2.7.1 XAUI/10GFC Mode
XAUI LANE
Lane 3
Lane 2
Lane 1
Lane 0
Table 2-3. XAUI – Lane To Functional Pin Mapping (XAUI_ORDER = 1)
TRANSMIT
CONTROL BIT
(INPUT)
TXC_[3]
TXC_[2]
TXC_[1]
TXC_[0]
TRANSMIT
DATA BYTE
(INPUT)
TXD_[31:24]
TXD_[23:16]
TXD_[15:8]
TXD_[7:0]
RECEIVE
CONTROL BIT
(OUTPUT)
RXC_[3]
RXC_[2]
RXC_[1]
RXC_[0]
RECEIVE
CONTROL BYTE
(OUTPUT)
RXD_[31:24]
RXD_[23:16]
RXD_[15:8]
RXD_[7:0]
TRANSMIT
CLOCK
(INPUT)
TXCLK_[1]
TXCLK_[1]
TXCLK_[1]
TXCLK_[1]
RECEIVE
CLOCK
(OUTPUT)
RXCLK_[1]
RXCLK_[1]
RXCLK_[1]
RXCLK_[1]
Table 2-4. 10GFC – Lane To Functional Pin Mapping (XAUI_ORDER = 0)
10GFC LANE
Lane 0
Lane 1
Lane 2
Lane 3
TRANSMIT
CONTROL BIT
(INPUT)
TXC_[3]
TXC_[2]
TXC_[1]
TXC_[0]
TRANSMIT
DATA BYTE
(INPUT)
TXD_[31:24]
TXD_[23:16]
TXD_[15:8]
TXD_[7:0]
RECEIVE
CONTROL BIT
(OUTPUT)
RXC_[3]
RXC_[2]
RXC_[1]
RXC_[0]
RECEIVE
CONTROL BYTE
(OUTPUT)
RXD_[31:24]
RXD_[23:16]
RXD_[15:8]
RXD_[7:0]
TRANSMIT
CLOCK
(INPUT)
TXCLK_[1]
TXCLK_[1]
TXCLK_[1]
TXCLK_[1]
RECEIVE
CLOCK
(OUTPUT)
RXCLK_[1]
RXCLK_[1]
RXCLK_[1]
RXCLK_[1]
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Detailed Description
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