TLK3134_1 Datasheet, PDF (97/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

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TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
3.3 Jitter Test Pattern Generation and Verification Procedures
Use one of the following procedures to generate and verify the respective test patterns. It is assumed that
an appropriate external cable has been connected between serial outputs and serial inputs. No functional
parallel side connections are necessary.
• XAUI Based High Frequency Test Pattern:
– Device Pin Setting(s):
• Ensure ST primary input pin is low.
– Reset Device:
• Issue a hard or soft reset (RST_N asserted –or- Write 1 to 4/5.0.15)
– Select single ended or differential REFCLK input:
• If Single Ended REFCLK used - Write 2’b01 to 4/5.37120.15:14
• If Differential REFCLK used – Write 2’b00 to 4/5.37120.15:14
– Select SERDES TX Reference Clock Input:
• If Single Ended REFCLK used - Write 2’b10 to 4/5.37120.11:10
• If Differential REFCLK used – Write 2’b11 to 4/5.37120.11:10
– Select SERDES RX Reference Clock Input:
• If Single Ended REFCLK used - Write 2’b10 to 4/5.37120.9:8
• If Differential REFCLK used – Write 2’b11 to 4/5.37120.9:8
– Ensure a legal reference clock operation frequency is selected based on Appendix A, and provision
control settings accordingly. It is also possible to use the Jitter Cleaner during these tests, and the
user should consult Appendix A for further Jitter Cleaner provisioning details.
– Issue Datapath Reset:
• Write 1’b1 to 4/5.32800.15
– Verify RX Link Up:
• Read 4/5.8.10, and discard value read.
• Poll 4/5.8.10 deasserted.
– Bypass Lane Alignment Logic:
• Write 1’b1 to 4/5.32798.3
– Select Test Pattern:
• Write 2’b00 to 4/5.25.1:0.
– Enable Pattern Generation/Verification
• Write 1’b1 to 4/5.25.2.
– Clear Error Counters:
• Read 4/5.32774, 4/5.32775, 4/5.32776, 4/5.32777
– The pattern verification is now in progress.
– Verify Error Free Operation (as many times as desired during the duration of the test period):
• Read 4/5.32774, and verify 16’h0000 is read to confirm error free operation.
• Read 4/5.32775, and verify 16’h0000 is read to confirm error free operation.
• Read 4/5.32776, and verify 16’h0000 is read to confirm error free operation.
• Read 4/5.32777, and verify 16’h0000 is read to confirm error free operation.
• XAUI Based Low Frequency Test Pattern:
– Follow the XAUI Based High Frequency Test Pattern procedure above, with the following
exception:
• Write 2’b01 to 4/5.25.1:0 instead of 2’b00.
• XAUI Based Mixed Frequency Test Pattern:
– Follow the XAUI Based High Frequency Test Pattern procedure above, with the following
exception:
• Write 2’b10 to 4/5.25.1:0 instead of 2’b00.
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Device Reset Requirements/Procedure
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