TLK3134_1 Datasheet, PDF (59/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

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BIT(s)
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TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
Table 2-54. BIT_ORDER (continued)
ADDRESS: 0x8017
DEFAULT: 0x0005
NAME
DESCRIPTION
XAUI TX bit order
When high, reverses the order of bits in the parallel data sent to the SERDES
TX macro for each lane. (Default 1’b1)
ACCESS
RW
Table 2-55. LOOPBACK_CONTROL⁽¹⁾
BIT(s)
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ADDRESS: 0x8018
DEFAULT: 0x0000
NAME
DESCRIPTION
XAUI data loopback
When 1, loops back serial RX input on to serial TX output. (4/5.0.14
should be 0 else no effect). Performs same function as SLOOP. (Default
1’b0)
When 1, loops back parallel TX input onto parallel RX output (4/5.0.14
XGMII data loopback should be 0 else no effect). Performs same function as PLOOP. (Default
1’b0)
(1) See Loopback section for more information.
BIT(s)
4/5.32793.15
4/5.32793.11
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4/5.32793.4
Table 2-56. TX_MODE_CONTROL
ADDRESS: 0x8019
NAME
TX IPG management bypass
TX CTC disable
Lane 3 8B10B encoder disable
Lane 2 8B10B encoder disable
Lane 1 8B10B encoder disable
Lane 0 8B10B encoder disable
DEFAULT: 0x0000
DESCRIPTION
When high, bypasses IPG management (replacing Idle XGMII
characters with /A/K/R/Q/ code-words) in transmit side.
(Default 1’b0)
When high, disables clock tolerance compensation in transmit
side. (Default 1’b0)
When high, disables XAUI 8B10B encoding on the
corresponding lane. (Default 1’b0)
ACCESS
RW
ACCESS
RW
RW
RW
BIT(s)
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4/5.32794.4
4/5.32794.3
4/5.32794.2
4/5.32794.1
4/5.32794.0
Table 2-57. RX_CTC_STATUS
ADDRESS: 0x801A
DEFAULT: 0x0000
NAME
DESCRIPTION
Lane 3 overflow
Lane 2 overflow
Lane 1 overflow
When high, indicates overflow error in the corresponding lane.
Lane 0 overflow
Lane 3 underflow
Lane 2 underflow
Lane 1 underflow
When high, indicates underflow error in the corresponding lane.
Lane 0 underflow
Overflow
When high, indicates overflow error in any lane.
Underflow
When high, indicates underflow error in any lane.
ACCESS
RO/LH
RO/LH
RO/LH
RO/LH
BIT(s)
4/5.32795.15:0
Table 2-58. RX_CTC_INSERT_COUNT
ADDRESS: 0x801B
NAME
DESCRIPTION
Idle insert count
Counter for number of idle insertions in RX side
DEFAULT: 0xFFFD
ACCESS
RO/COR
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