TLK3134_1 Datasheet, PDF (28/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
2.7.7 REBI Mode (Reduced Eight Bit Interface)
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DATA CHANNEL
NUMBER
Channel 0
Channel 1
Channel 2
Channel 3
Table 2-10. REBI – Lane To Functional Pin Mapping
TRANSMIT DATA 4 BITS
(INPUT)
TXD_[3:0]
TXD_[11:8]
TXD_[19:16]
TXD_[27:24]
RECEIVE DATA 4 BITS
(OUTPUT)
RXD_[3:0]
RXD_[11:8]
RXD_[19:16]
RXD_[27:24]
TRANSMIT CLOCK
(INPUT)
TXCLK_[0]
TXCLK_[1]
TXCLK_[2]
TXCLK_[3]
RECEIVE CLOCK
(OUTPUT)
RXCLK_[0]
RXCLK_[1]
RXCLK_[2]
RXCLK_[3]
TXCLK_[0]
DDR Source Centered Timing
(Nibble Order = 1 Default)
TXCLK_[0]
DDR Source Centered Timing
(Nibble Order = 0)
TXD_[3:0]
Data0[3:0]
Data0[7:4]
TXD_[3:0]
Data0[7:4]
Data0[3:0]
RXCLK_[0]
RXD_[3:0]
TXCLK_[0]
TXD_[3:0]
Data0[3:0]
Data0[7:4]
DDR Source Aligned Timing
(Nibble Order = 1 Default)
Data0[3:0]
Data0[7:4]
RXCLK_[0]
RXD_[3:0]
Data0[7:4]
Data0[3:0]
TXCLK_[0]
TXD_[3:0]
DDR Source Aligned Timing
(Nibble Order = 0)
Data0[7:4]
Data0[3:0]
RXCLK_[0]
RXCLK_[0]
RXD_[3:0]
Data0[3:0]
Data0[7:4]
RXD_[3:0]
Data0[7:4]
Data0[3:0]
Figure 2-13. REBI – Individual Channel Byte Ordering – Channel 0 Example
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Detailed Description
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