TLK3134_1 Datasheet, PDF (96/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
www.ti.com
– Write 4’b0001 to 4/5.36868.15:12 to turn on adaptive equalization (4’b0000 is off)
– Write 4’b0001 to 4/5.36870.15:12 to turn on adaptive equalization (4’b0000 is off)
– Write 4’b0001 to 4/5.36872.15:12 to turn on adaptive equalization (4’b0000 is off)
– Write 2’b01 to 4/5.36866.3:2 for AC coupled mode (2’b00 is DC coupled mode)
– Write 2’b01 to 4/5.36868.3:2 for AC coupled mode (2’b00 is DC coupled mode)
– Write 2’b01 to 4/5.36870.3:2 for AC coupled mode (2’b00 is DC coupled mode)
– Write 2’b01 to 4/5.36872.3:2 for AC coupled mode (2’b00 is DC coupled mode)
• TX DLL Offset
– Write 16'h0028 to 4/5.37888 TX0_DLL_CONTROL
– Write 16'h0028 to 4/5.37889 TX1_DLL_CONTROL
– Write 16'h0028 to 4/5.37890 TX2_DLL_CONTROL
– Write 16'h0028 to 4/5.37891 TX3_DLL_CONTROL
• Poll Serdes PLL Status for Locked State
– Read 4/5.36891.4,0 SERDES_PLL_STATUS – PLL_LOCK_TX/RX
– Keep polling until both bits are high
• Issue Data path Reset
– Write 1’b1 to 16.11 (per channel)
• Clear Latched Registers
– Read 1 PHY_STATUS_1 to clear (per channel)
– Read 18 PHY_RX_CTC_FIFO_STATUS to clear (per channel)
– Read 19 PHY_TX_CTC_FIFO_STATUS to clear (per channel)
– Read 28 PHY_CHANNEL_STATUS to clear (per channel)
– Read 4/5.36891 SERDES_PLL_STATUS to clear
• Operational Mode Status
– Read Verify 1.2 PHY_STATUS_1 – Link Status (1’b1) (per channel)
– Read Verify 18.15 PHY_RX_CTC_FIFO_STATUS – RX_CTC_Reset (1’b0) (per channel)
– Read Verify 19.15 PHY_TX_CTC_FIFO_STATUS – TX_FIFO_Reset_1Gx (1’b0) (per channel)
– Read Verify 28.13:12 PHY_CHANNEL_STATUS – Enc/Dec Invalid Code Word (2’b00) (per
channel)
– Read Verify 4/5.36891.4 SERDES_PLL_STATUS – PLL_LOCK_RX (1’b1)
– Read Verify 4/5.36891.0 SERDES_PLL_STATUS – PLL_LOCK_TX (1’b1)
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Device Reset Requirements/Procedure
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