TLK3134_1 Datasheet, PDF (102/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
www.ti.com
• Issue a hard or soft reset (RST_N asserted –or- ST=0: Write 1 to 4/5.0.15 ST=1: Write 1 to
0.15)
– Select single ended or differential REFCLK input:
• If Single Ended REFCLK used - Write 2’b01 to 4/5.37120.15:14
• If Differential REFCLK used – Write 2’b00 to 4/5.37120.15:14
– Select SERDES TX Reference Clock Input:
• If Single Ended REFCLK used - Write 2’b10 to 4/5.37120.11:10
• If Differential REFCLK used – Write 2’b11 to 4/5.37120.11:10
– Select SERDES RX Reference Clock Input:
• If Single Ended REFCLK used - Write 2’b10 to 4/5.37120.9:8
• If Differential REFCLK used – Write 2’b11 to 4/5.37120.9:8
– Ensure a legal reference clock operation frequency is selected based on Appendix A, and provision
control settings accordingly. It is also possible to use the Jitter Cleaner during these tests, and the
user should consult Appendix A for further Jitter Cleaner provisioning details.
– Issue Datapath Reset:
• If ST=1: Write 1’b1 to 16.11
• If ST=0: Write 1’b1 to 4/5.32800.15
– GPO3 contains a real time output that when high indicates if the input PRBS pattern on TD × 3/RD
× 3 is errored.
– GPO2 contains a real time output that when high indicates if the input PRBS pattern on TD × 2/RD
× 2 is errored.
– GPO1 contains a real time output that when high indicates if the input PRBS pattern on TD × 1/RD
× 1 is errored.
– GPO0 contains a real time output that when high indicates if the input PRBS pattern on TD × 0/RD
× 0 is errored.
• SERDES Macro 2⁷-1/2²³-1 PRBS Register Based Testing
– Reset Device:
• Issue a hard or soft reset (RST_N asserted –or- ST=0: Write 1 to 4/5.0.15 ST=1: Write 1 to
0.15)
– Select single ended or differential REFCLK input:
• If Single Ended REFCLK used - Write 2’b01 to 4/5.37120.15:14
• If Differential REFCLK used – Write 2’b00 to 4/5.37120.15:14
– Select SERDES TX Reference Clock Input:
• If Single Ended REFCLK used - Write 2’b10 to 4/5.37120.11:10
• If Differential REFCLK used – Write 2’b11 to 4/5.37120.11:10
– Select SERDES RX Reference Clock Input:
• If Single Ended REFCLK used - Write 2’b10 to 4/5.37120.9:8
• If Differential REFCLK used – Write 2’b11 to 4/5.37120.9:8
– Ensure a legal reference clock operation frequency is selected based on Appendix A, and provision
control settings accordingly. It is also possible to use the Jitter Cleaner during these tests, and the
user should consult Appendix A for further Jitter Cleaner provisioning details.
– PRBS Selection:
• For PRBS 2⁷-1-
– Write 2’b10 4/5.36881.1:0.
– Write 2’b10 4/5.36882.1:0.
• For PRBS 2²³-1-
– Write 2’b11 4/5.36881.1:0.
– Write 2’b11 4/5.36882.1:0.
102 Device Reset Requirements/Procedure
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