TLK3134_1 Datasheet, PDF (14/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
www.ti.com
1.4 Description
The TLK3134 is a flexible four-channel independently configurable serial transceiver. It can be configured
to be compliant with the 10Gbps Ethernet XAUI specification. It can also be configured to be compliant
with the 1000Base-X 1Gbps Ethernet Specification (Auto-Negotiation not supported). The TLK3134
provides high-speed bidirectional point-to-point data transmissions with up to 30 Gbps of raw data
transmission capacity. The primary application of this device is in backplanes and front panel connections
requiring 10Gbps connections over controlled impedance media of approximately 50Ω. The transmission
media can be printed circuit board (PCB) traces, copper cables or fiber-optical media. The ultimate rate
and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise
coupling into the lines.
The TLK3134 performs the parallel-to-serial, serial-to-parallel conversion, and clock extraction functions
for a physical layer interface. The TLK3134 provides a complete XGXS/PCS function defined in Clause
47/48 of the IEEE 802.3ae 10Gbps Ethernet standard. The TLK3134 also provides 1000Base-X (PCS)
layer functionality described in Clause 36 of 802.3-2002. The serial transmitter is implemented using
differential Current Mode Logic (CML) with integrated termination resistors.
The TLK3134 can be optionally configured as a XAUI or 10GFC transceiver. TLK3134 supports a 32-bit
data path, 4-bit control, 10 Gigabit Media Independent Interface (XGMII) to the protocol device. Figure 1-1
shows an example system block diagram for TLK3134 used to provide the 10Gbps Ethernet Physical
Coding Sublayer to Coarse Wave-length Division Multiplexed optical transceiver or parallel optics.
Many common applications may be enabled by way of externally available control pins. Detailed control of
the TLK3134 on a per channel basis is available by way of accessing a register space of control bits
available through a two-wire access port called the Management Data Input/Output (MDIO) interface.
The PCS (Physical Coding Sublayer) functions such as the CTC FIFO are designed to be compliant for an
IEEE 802.3 XAUI or 1000Base-X PCS link. However, each of the PCS functions may be disabled or
bypassed until the TLK3134 is operating at its most basic state, that of a simple four channel 10-bit
SERDES suitable for a wide range of applications such as CPRI or OBSAI wireless infrastructure links.
The differential output swing for the TLK3134 is suitable for compliance with IEEE 802.3 XAUI links, which
is also suitable for CPRI LV serial links. The TLK3134 provides for setting larger output signal swing
suitable for CPRI HV links by setting an appropriate register bit available though MDIO.
Line Card
4
TLK3134
4
MAC/
Packet
Processor
TCLK
TD(31:0)
TC(3:0)
4
CWDM or
Parallel
4
Optics
TLK3134
RC(3:0)
RCLK
RD(31:0)
Figure 1-1. System Block Diagram – XAUI
Figure 1-2 shows an example system block diagram for TLK3134 used to provide the system backplane
interconnect.
14
Introduction
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