TLK3134_1 Datasheet, PDF (84/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
BIT(s)
4/5.37633.3:2
Table 2-142. HSTL_OUTPUT_SLEWRATE_CONTROL (continued)
ADDRESS: 0x9301
DEFAULT: 0x0000
NAME
DESCRIPTION
Slew Rate setting for output HSTL cells (for CH 0)
00 = No slew control (fastest edge)
HSTL_SLEW_RATE_0 [1:0] 01 = 33% slew control
10 = 66 % slew control termination strength
11 = Full slew control (slowest edge)
Table 2-143. HSTL_INPUT_VTP_CONTROL
BIT(s)
ADDRESS: 0x9302
NAME
4/5.37634.15 I_FORCE_UP_N
4/5.37634.14 I_FORCE_UP_P
4/5.37634.13 I_FORCE_DOWN_N
4/5.37634.12 I_FORCE_DOWN_P
4/5.37634.11:9 I_VTP_DRIVE[2:0]
4/5.37634.7:5 I_FILTER_CONTROL[2:0]
4/5.37634.3 I_LOCK
DEFAULT: 0x0640
DESCRIPTION
When set, increases NFET strength in all HSTL input cells. For TI
purposes Only
When set, increases PFET strength in all HSTL input cells. For TI
purposes Only
When set, decreases NFET strength in all HSTL input cells. For TI
purposes Only
When set, decreases PFET strength in all HSTL input cells. For TI
purposes Only
Drive strength control for HSTL input cells
3’b000 = 30 % drive strength increase
3’b001 = 20% drive strength increase
3’b010 = 10% drive strength increase
3’b011 = Normal drive strength (default)
3’b100 = 10% drive strength decrease
3’b101 = 20% drive strength decrease
3’b110 = 30% drive strength decrease
3’b111 = 40% drive strength decrease
Filter Control
3’b000 = Impedance change filtering off
3’b001 = Update on 2 consecutive update requests
3’b010 = Update on 3 consecutive update requests(default)
3’b011 = Update on 4 consecutive update requests
3’b100 = Update on 5 consecutive update requests
3’b101 = Update on 6 consecutive update requests
3’b110 = Update on 7 consecutive update requests
3’b111 = Update on 8 consecutive update requests
Impedance Lock Control
When set, disables dynamic impedance control updates for HSTL input
cells
BIT(s)
4/5.37635.15
4/5.37635.14
4/5.37635.13
4/5.37635.12
Table 2-144. HSTL_OUTPUT_VTP_CONTROL
ADDRESS: 0x9303
NAME
O_FORCE_UP_N
O_FORCE_UP_P
O_FORCE_DOWN_N
O_FORCE_DOWN_P
DEFAULT: 0x0640
DESCRIPTION
When set, increases NFET strength in all HSTL output cells . For TI
purposes Only
When set, increases PFET strength in all HSTL output cells . For TI
purposes Only
When set, decreases NFET strength in all HSTL output cells . For TI
purposes Only
When set, decreases PFET strength in all HSTL output cells . For TI
purposes Only
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