TLK3134_1 Datasheet, PDF (67/150 Pages) Texas Instruments – 4-Channel Multi-Rate Transceiver

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TLK3134
4-Channel Multi-Rate Transceiver
SLLS838D – MAY 2007 – REVISED JULY 2008
BIT(s)
19.15
Table 2-82. PHY_TX_CTC_FIFO_STATUS
ADDRESS: 0x13
DEFAULT: 0x0000
NAME
DESCRIPTION
TX_FIFO_Reset_1Gx
When high indicates collision has occurred in TX FIFO and the FIFO is
reset in 1gx mode. Valid in Non-NBID, Non-TBID modes.
ACCESS
RO/LH
BIT(s)
20.15
20.14
Table 2-83. PHY_TX_WIDE_FIFO _STATUS
ADDRESS: 0x14
NAME
TX_WIDE_FIFO_
Overflow
TX_WIDE_FIFO_
Underflow
DEFAULT: 0x0000
DESCRIPTION
When high indicates Overflow condition has occurred in TX WIDE FIFO.
Valid only when device is in NBID/TBID modes.
When high indicates Underflow condition has occurred in TX WIDE
FIFO. Valid only when device is in NBID/TBID modes.
ACCESS
RO/LH
BIT(s)
21.1
21.0
Table 2-84. PHY_TEST_PATTERN_SYNC_STATUS
ADDRESS: 0x15
NAME
Test Pattern Sync
CRPAT Sync
DEFAULT: 0x0000
DESCRIPTION
When high indicates alignment has been determined and a correct
pattern has been received for fixed test patterns.
When high indicates alignment has been determined and a correct
pattern has been received for continuous test patterns.
ACCESS
RO
BIT(s)
22.15:0
Table 2-85. PHY_TEST_PATTERN_COUNTER
ADDRESS: 0x16
NAME
Fixed Test Pattern
Error Counter
DEFAULT: 0xFFFD
DESCRIPTION
This counter reflects error count for high, Mixed, and Low Frequency test
patterns. Counter increments for each received character that has an
error. Counter clears upon read.
ACCESS
COR
Table 2-86. PHY_CRPAT_PATTERN_COUNTER_1⁽¹⁾
BIT(s)
23.15:0
ADDRESS: 0x17
NAME
CRPAT Error
counter[31:16]
DEFAULT: 0xFFFF
DESCRIPTION
This counter reflects MSW part of error count for CRPAT Frequency test
pattern. Counter increments for each received character that has an
error. Counter clears upon read.
ACCESS
COR
(1) User has to make sure that register 23 is read first and then register 24. If user reads register 24 before reading register 23, then the
count value read through register 24 may not be correct.
Table 2-87. PHY_CRPAT_PATTERN_COUNTER_2⁽¹⁾
BIT(s)
24.15:0
ADDRESS: 0x18
NAME
CRPAT Error
counter[15:0]
DEFAULT: 0xFFFD
DESCRIPTION
This counter reflects LSW part of error count for CRPAT Frequency test
pattern. Counter increments for each received character that has an
error. Counter clears upon read.
ACCESS
COR
(1) User has to make sure that register 23 is read first and then register 24. If user reads register 24 before reading register 23, then the
count value read through register 24 may not be correct.
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Detailed Description
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