UPSD3422_06 Datasheet, PDF (48/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

Dual data pointers
uPSD34xx
11.2
11.2.1
Data pointer mode register, DPTM (86h)
The two “background” data pointers, DPTR0 and DPTR1, can be configured to
automatically increment, decrement, or stay the same after a MOVX instruction accesses
the DPTR Register. Only the currently selected pointer will be affected by the increment or
decrement. This feature is controlled by the DPTM Register defined in Table 14.
The automatic increment or decrement function is effective only for the MOVX instruction,
and not MOVC or any other instruction that uses the DTPR Register.
Firmware example
The 8051 assembly code illustrated in Table 15 shows how to transfer a block of data bytes
from one XDATA address region to another XDATA address region. Auto-address
incrementing and auto-pointer toggling will be used.
Table 14.
Bit 7
–
DPTM: data pointer mode register (SFR 86h, reset value 00h)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
–
–
–
MD11
MD10
MD01
Bit 0
MD00
Bit
Symbol
R/W
7-4
–
–
DPTR1 Mode Bits
Definition
Reserved
00: DPTR1 No Change
3-2
MD[11:10] R,W
01: Reserved
10: Auto Increment
11: Auto Decrement
DPTR0 Mode Bits
00: DPTR0 No Change
1-0
MD[01:00] R,W
01: Reserved
10: Auto Increment
11: Auto Decrement
Table 15. 8051 assembly code example
MOV
R7, #COUNT
; initialize size of data block to transfer
MOV
DPTR,
#SOURCE_ADDR
; load XDATA source address base into DPTR0
MOV
85h, #01h
; load DPTC to access DPTR1 pointer
MOV
DPTR, #DEST_ADDR ; load XDATA destination address base into DPTR1
MOV
85h, #40h
; load DPTC to access DPTR0 pointer and auto
toggle
MOV
86h, #0Ah
; load DPTM to auto-increment both pointers
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