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UPSD3422_06 Datasheet, PDF (281/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic
uPSD34xx
DC and AC parameters
Symbol
Parameter
Conditions
Min
tISCPCO ISC Port Clock to Output
tISCPZV ISC Port High-Impedance to Valid Output
tISCPVZ ISC Port Valid Output to High-Impedance
Note: 1 For non-PLD Programming, Erase or in ISC By-pass Mode.
2 For Program or Erase PLD only.
Table 181. ISC timing (3V PSD module)
Symbol
Parameter
Conditions
Min
tISCCF
Clock (TCK, PC1) Frequency (except for
PLD)
(Note 1)
tISCCH
Clock (TCK, PC1) High Time (except for
PLD)
(Note 1)
40
tISCCL
Clock (TCK, PC1) Low Time (except for
PLD)
(Note 1)
40
tISCCFP Clock (TCK, PC1) Frequency (PLD only)
(Note 2)
tISCCHP Clock (TCK, PC1) High Time (PLD only)
(Note 2)
90
tISCCLP Clock (TCK, PC1) Low Time (PLD only)
(Note 2)
90
tISCPSU ISC Port Set Up Time
12
tISCPH ISC Port Hold Up Time
5
tISCPCO ISC Port Clock to Output
tISCPZV ISC Port High-Impedance to Valid Output
tISCPVZ ISC Port Valid Output to High-Impedance
Note: 1 For non-PLD Programming, Erase or in ISC By-pass Mode.
2 For Program or Erase PLD only.
Figure 109. MCU module AC measurement I/O waveform
Max Unit
21
ns
21
ns
21
ns
Max Unit
16 MHz
ns
ns
4
MHz
ns
ns
ns
ns
30
ns
30
ns
30
ns
Note:
Note:
VCC – 0.5V
0.45V
0.2 VCC + 0.9V
Test Points
0.2 VCC – 0.1V
AI06650
AC inputs during testing are driven at VCC–0.5V for a logic '1,' and 0.45V for a logic '0.'
Timing measurements are made at VIH(min) for a logic '1,' and VIL(max) for a logic '0'
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