UPSD3422_06 Datasheet, PDF (134/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

SPI (synchronous peripheral interface)
24 SPI (synchronous peripheral interface)
uPSD34xx
uPSD34xx devices support one serial SPI interface in Master Mode only. This is a three- or
four-wire synchronous communication channel, capable of full-duplex operation on 8-bit
serial data transfers. The four SPI bus signals are:
● SPIRxD
Pin P1.5 or P4.5 receives data from the Slave SPI device to the uPSD34xx
● SPITxD
Pin P1.6 or P4.6 transmits data from the uPSD34xx to the Slave SPI device
● SPICLK
Pin P1.4 or P4.4 clock is generated from the uPSD34xx to the SPI Slave device
● SPISEL
Pin P1.7 or P4.7 selects the signal from the uPSD34xx to an individual Slave SPI
device
This SPI interface supports single-Master/multiple-Slave connections. Multiple-Master
connections are not directly supported by the uPSD34xx (no internal logic for collision
detection).
If more than one Slave device is required, the SPISEL signal may be generated from
uPSD34xx GPIO outputs (one for each Slave) or from the PLD outputs of the PSD Module.
Figure 44 illustrates three examples of SPI device connections using the uPSD34xx:
● Single-Master/Single-Slave with SPISEL
● Single-Master/Single-Slave without SPISEL
● Single-Master/Multiple-Slave without SPISEL
Figure 44. SPI device connection examples
uPSD34xx
SPI Master
SPIRxD
SPITxD
SPICLK
SPISEL
SPI Bus
MISO
MOSI
SCLK
SS
SPI Slave
Device
uPSD34xx
SPI Master
SPIRxD
SPITxD
SPICLK
SPI Bus
MISO
MOSI
SCLK
SS
SPI Slave
Device
Single-Master/Single-Slave, with SPISEL
Single-Master/Single-Slave, without SPISEL
SPIRxD
SPITxD
SPICLK
GPIO or PLD
uPSD34xx
SPI Master
SPI Bus
GPIO or PLD
MISO
MOSI
SCLK
SS
MISO
MOSI
SCLK
SS
SPI Slave
Device
SPI Slave
Device
Single-Master/Multiple-Slave, without SPISEL
AI07853b
134/293