UPSD3422_06 Datasheet, PDF (162/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

USB interface
uPSD34xx
● USB IN FIFO NAK Interrupt Flag (UIF3)
The USB IN FIFO NAK Interrupt Flag register (see Table 79) contains flags that
indicate when an IN Endpoint FIFO is not ready. The Endpoint FIFO is not ready when
data has not been loaded into its FIFO and the USIZE register has not been written to
(writing to the USIZE register puts the FIFO in a “ready” to send data state). Until the
FIFO is ready, the SIE will continue to NAK all IN requests to the respective Endpoint.
Once set, firmware must clear the flag by writing a '0' to the appropriate bit. When
FIFOs are paired, only the odd numbered FIFO Interrupt Flags are active.
Table 79.
Bit 7
–
USB IN FIFO NAK interrupt flag (UIF3 0EBh, reset value 00h)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
–
–
NAK4F NAK3F NAK2F NAK1F
Bit 0
NAK0F
Bit
Symbol
R/W
Definition
7
–
–
Reserved
6
–
–
Reserved
5
–
–
Reserved
Endpoint 4 IN FIFO NAK Interrupt flag
4
NAK4F
R/W This bit is set when the SIE responded to an IN request with a
NAK since the FIFO was not ready.
Endpoint 3 IN FIFO NAK Interrupt flag
3
NAK3F
R/W _{This bit is set when the SIE responded to an IN request with a}
NAK since the FIFO was not ready.
Endpoint 2 IN FIFO NAK Interrupt flag
2
NAK2F
R/W _{This bit is set when the SIE responded to an IN request with a}
NAK since the FIFO was not ready.
Endpoint 1 IN FIFO NAK Interrupt flag
1
NAK1F
R/W This bit is set when the SIE responded to an IN request with a
NAK since the FIFO was not ready.
Endpoint 0 IN FIFO NAK Interrupt flag
0
NAK0F
R/W _{This bit is set when the SIE responded to an IN request with a}
NAK since the FIFO was not ready.
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