UPSD3422_06 Datasheet, PDF (161/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

uPSD34xx
USB interface
● USB OUT FIFO Interrupt Flag (UIF2)
The USB OUT FIFO Interrupt Flag register (see Table 78) contains flags that indicate
when an OUT Endpoint FIFO that was empty becomes full. Once set, firmware must
clear the flag by writing a '0' to the appropriate bit. When FIFOs are paired, only the
odd numbered FIFO Interrupt flags are active.
Table 78.
Bit 7
–
USB OUT FIFO interrupt flag (UIF2 0EAh, reset value 00h)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
–
–
OUT4F OUT3F OUT2F OUT1F
Bit 0
OUT0F
Bit
Symbol
R/W
Definition
7
–
–
Reserved
6
–
–
Reserved
5
–
–
Reserved
Endpoint 4 OUT FIFO Interrupt flag
4
OUT4F
R/W This bit is set when the FIFO status changes from empty to
full.
Endpoint 3 OUT FIFO Interrupt flag
3
OUT3F
R/W _{This bit is set when the FIFO status changes from empty to}
full.
Endpoint 2 OUT FIFO Interrupt flag
2
OUT2F
R/W _{This bit is set when the FIFO status changes from empty to}
full.
Endpoint 1 OUT FIFO Interrupt flag
1
OUT1F
R/W This bit is set when the FIFO status changes from empty to
full.
Endpoint 0 OUT FIFO Interrupt flag
0
OUT0F
R/W _{This bit is set when the FIFO status changes from empty to}
full.
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