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UPSD3422_06 Datasheet, PDF (267/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic
uPSD34xx
DC and AC parameters
Table 157. PSD module DC characteristics (with 5V VDD)
Symbo
l
Parameter
Test Condition
(in addition to those in Min. Typ. Max. Unit
Table 156 on page 265)
VIH
VIL
VLKO
Input High Voltage
Input Low Voltage
VDD (min) for Flash Erase
and Program
4.5V < VDD < 5.5V
4.5V < VDD < 5.5V
2
–0.5
2.5
VDD +0.5 V
0.8
V
4.2
V
VOL Output Low Voltage
IOL = 20uA, VDD = 4.5V
IOL = 8mA, VDD = 4.5V
0.01 0.1
V
0.25 0.45
V
VOH
Output High Voltage
Except VSTBY On
IOH = –20uA, VDD = 4.5V 4.4 4.49
IOH = –2mA, VDD = 4.5V 2.4
3.9
V
V
VOH1
Output High Voltage
VSTBY On
IOH1 = 1uA
VSTBY –
0.8
V
VSTBY SRAM Stand-by Voltage
2.0
VDD
V
ISTBY SRAM Stand-by Current
VDD = 0V
0.5
1
uA
IIDLE Idle Current (VSTBY input)
VDD > VSTBY
–0.1
0.1
uA
VDF
SRAM Data Retention
Voltage
Only on VSTBY
2
VDD – 0.2 V
Stand-by Supply Current
ISB for Power-down Mode
CSI > VDD – 0.3V
(Notes 1,2)
120 250
uA
ILI Input Leakage Current
ILO Output Leakage Current
ICC
(DC)
(Note
4)
Operating
Supply
Current
PLD Only
Flash
memory
VSS < VIN < VDD
0.45 < VOUT < VDD
PLD_TURBO = Off,
f = 0MHz (Note 4)
PLD_TURBO = On,
f = 0MHz
During Flash memory
WRITE/Erase Only
Read only, f = 0MHz
–1 ±0.1
1
uA
–10 ±5
10
uA
0
uA/P
T
400
700
uA/P
T
15
30
mA
0
0
mA
SRAM
f = 0MHz
0
0
mA
ICC
(AC)
(Note
4)
PLD AC Adder
Flash memory AC Adder
SRAM AC Adder
Note 3
1.5
2.5
mA/M
Hz
1.5
3.0
mA/M
Hz
Note: 1 Internal Power-down mode is active.
2 PLD is in non-Turbo mode, and none of the inputs are switching.
3 Please see Figure 96 on page 259 for the PLD current calculation.
4 IOUT = 0mA
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