UPSD3422_06 Datasheet, PDF (160/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

USB interface
uPSD34xx
● USB IN FIFO Interrupt Flag (UIF1)
The USB IN FIFO Interrupt Flag register (see Table 77) contains flags that indicate
when an IN Endpoint FIFO that was full becomes empty. Once set, firmware must
clear the flag by writing a '0' to the appropriate bit. When FIFOs are paired, only the
odd numbered FIFO Interrupt flags are active.
Table 77.
Bit 7
–
USB IN FIFO interrupt flag (UIF1 0E9h, reset value 00h)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
–
–
IN4F
IN3F
IN2F
IN1F
Bit 0
IN0F
Bit
Symbol
R/W
Definition
7
–
–
Reserved
6
–
–
Reserved
5
–
–
Reserved
Endpoint 4 IN FIFO Interrupt flag
4
IN4F
R/W
This bit is set when the FIFO status changes from full to empty.
Endpoint 3 IN FIFO Interrupt flag
3
IN3F
R/W
This bit is set when the FIFO status changes from full to empty.
Endpoint 2 IN FIFO Interrupt flag
2
IN2F
R/W
This bit is set when the FIFO status changes from full to empty.
Endpoint 1 IN FIFO Interrupt flag
1
IN1F
R/W
This bit is set when the FIFO status changes from full to empty.
Endpoint 0 IN FIFO Interrupt flag
0
IN0F
R/W
This bit is set when the FIFO status changes from full to empty.
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