UPSD3422_06 Datasheet, PDF (233/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

uPSD34xx
PSD module
Table 135. Latched address output, port B contro register (address = csiop + offset
03h)l
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PB7
(addr A7 or
A15)
PB6
(addr A6 or
A14)
PB5
(addr A5 or
A13)
PB4
(addr A4 or
A12)
PB3
(addr A3 or
A11)
PB2
(Addr A2 or
A10)
PB1
(addr A1 or
A9)
PB0
(addr A0 or
A8)
Note: 1 For each bit, 1 = drive demuxed 8032 address signal on pin, 0 = pin is default mode, MCU
I/O
2 Default state for register is 00h after reset or power-up
28.5.40
Note:
Peripheral I/O mode
This mode will provide a data bus repeater function for the 8032 to interface with external
parallel peripherals. The mode is only available on Port A (80-pin devices only) and the data
bus signals, D0 - D7, are de-multiplexed (no address A0-A7). When active, this mode
behaves like a bidirectional buffer, with the direction automatically controlled by the 8032 RD
and WR signals for a specified address range. The DPLD signals PSEL0 and PSEL1
determine this address range. Figure 80 on page 226 shows the action of Peripheral I/O
mode on the Output Enable logic of the tri-state output driver for a single port pin. Figure 84
on page 233 illustrates data repeater the operation. To activate this mode, choose the pin
function “Peripheral I/O Mode” in PSDsoft Express on any Port A pin (all eight pins of Port A
will automatically change to this mode). Next in PSDsoft, specify an address range for the
PSELx signals in the “Chip-Select” section of the “Design Assistant”. The user can specify
an address range for either PSEL0 or PSEL1. Always qualify the PSELx equation with
“PSEN is logic '1'” to ensure Peripheral I/O mode is only active during 8032 data cycles, not
code cycles. Only one equation is needed since PSELx signals are OR’ed together
(Figure 84). Then in the 8032 initialization firmware, a logic ’1’ is written to the csiop VM
register, Bit 7 (PIO_EN) as shown in Table 99 on page 184. After this, Port A will
automatically perform this repeater function whenever the 8032 presents an address (and
memory page number, if paging is used) that is within the range specified by PSELx. Once
Port A is designated as Peripheral I/O mode in PSDsoft Express, it cannot be used for other
functions.
The user can alternatively connect an external parallel peripheral to the standard 8032 AD0-
AD7 pins on an 80-pin uPSD device (not Port A), but these pins have multiplexed address
and data signals, with a weaker fanout drive capability.
Figure 84. Peripheral I/O mode
8032 RD
PSEL0
PSEL1
VM REGISTER BIT 7 (PIO EN)
8032 DATA
BUS D0-D7 8
(DE-MUXED)
PA0 - PA7
8 _PORT
A pins
8032 WR
AI02886A
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