UPSD3422_06 Datasheet, PDF (253/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

uPSD34xx
PSD module
28.6.3
28.6.4
Note:
Figure 91. JTAG chain in uPSD34xx package
OPTIONAL
DEBUG
RESET_IN
MCU MODULE
uPSD34xx
8032 MCU
RESET
JTAG TAP
CONTROLLER
TDO TMS TCK TDI
JTAG TDO
JTAG TCK
IEEE 1149.1
JTAG TMS
JTAG TDI
PC3 / TSTAT
OPTIONAL
PC4 / TERR
TDI
TSTAT
TERR
TMS TCK TDO
JTAG TAP
CONTROLLER
RST
MAIN
2ND
FLASH FLASH PLD
MEMORY MEMORY
PSD MODULE
AI10460
In-system programming
The ISP function can use two different configurations of the JTAG interface:
● 4-pin JTAG: TDI, TDO, TCK, TMS
● 6-pin JTAG: Signals above plus TSTAT, TERR
At power-up, the four basic JTAG signals are all inputs, waiting for a command to appear on
the JTAG bus from programming or test equipment. When the enabling command is
received, TDO becomes an output and the JTAG channel is fully functional. The same
command that enables the JTAG channel may optionally enable the two additional signals,
TSTAT and TERR.
4-pin JTAG ISP (default)
The four basic JTAG pins on Port C are enabled for JTAG operation at all times. These pins
may not be used for other I/O functions. There is no action needed in PSDsoft Express to
configure a device to use 4-pin JTAG, as this is the default condition. No 8032 firmware is
needed to use 4-pin ISP because all ISP functions are controlled from the external JTAG
program/test equipment. Figure 92 shows recommended connections on a circuit board to a
JTAG program/test tool using 4-pin JTAG. It is required to connect the RST output signal
from the JTAG program/test equipment to the RESET_IN input on the uPSD34xx. The RST
signal is driven by the equipment with an Open Drain driver, allowing other sources (like a
push button) to drive RESET_IN without conflict.
The recommended pull-up resistors and decoupling capacitor are illustrated in Figure 92.
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