UPSD3422_06 Datasheet, PDF (254/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

PSD module
uPSD34xx
Figure 92. Recommended 4-pin JTAG connections
CIRCUIT
BOARD
uPSD34xx
TMS - PC0
TCK - PC1
SRAM STBY or I/O - PC2
GENERAL I/O - PC3
GENERAL I/O - PC4
TDI - PC5
TDO - PC6
GENERAL I/O - PC7
RESETIN
100k
typical
GENERAL I/O
SIGNALS
0.01
µF
10k
JTAG
CONN.
TMS
TCK
TDI
TDO
V_CC(1,2)
JTAG
Programming
or Test
Equipment
Connects Here
GND
RST⁽³⁾
DEBUG
100k
PUSH BUTTON
or ANY OTHER
RESET SOURCE
OPTIONAL
TEST POINT
AI10457
Note: 1 For 5V uPSD34xx devices, pull-up resistors and V_CC pin on the JTAG connector should be
connected to 5V system V_DD.
2 For 3.3V uPSD34xx devices, pull-up resistors and V_CC pin on the JTAG connector should be
connected to 3.3V system V_CC.
3 This signal is driven by an Open-Drain output in the JTAG equipment, allowing more than
one source to activate RESETIN.
28.6.5
6-pin JTAG ISP (optional)
The optional signals TSTAT and TERR are programming status flags that can reduce
programming time by as much as 30% compared to 4-pin JTAG because this status
information does not have to be scanned out of the device serially. TSTAT and TERR must
be used as a pair for 6-pin JTAG operation.
● TSTAT (pin PC3) indicates when programming of a single Flash location is complete.
Logic 1 = Ready, Logic 0 = busy.
● TERR (pin PC4) indicates if there was a Flash programming error. Logic 1 = no error,
Logic 0 = error.
The pin functions for PC3 and PC4 must be selected as “Dedicated JTAG - TSTAT” and
“Dedicated JTAG - TERR” in PSDsoft Express to enable 6-pin JTAG ISP.
No 8032 firmware is needed to use 6-pin ISP because all ISP functions are controlled from
the external JTAG program/test equipment.
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