UPSD3422_06 Datasheet, PDF (152/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

USB interface
uPSD34xx
25.3.4
25.3.5
25.3.6
Figure 55. FIFO pairing example (1/2 IN paired and 3/4 OUT paired)
Endpoint4
Endpoint4 IN FIFO
Endpoint4
Serial
Interface
Engine
Endpoint3
Endpoint3 IN FIFO
Endpoint3
Endpoint2
(not available)
Endpoint1
P
a
Endpoint2 IN FIFO
P
a
i
i
r
r
e
d
Endpoint1 IN FIFO
e
d
Endpoint2
(not available)
Endpoint1
Endpoint0
Endpoint0
Endpoint1
Endpoint0 IN FIFO
Endpoint0 OUT FIFO
Endpoint1 OUT FIFO
Endpoint0
Endpoint0
FIFO
Interface
Logic
Endpoint1
8032
MCU
S
F
R
B
XDATA
u
s
CTRL _{USB SFRs}
Endpoint2
Endpoint2 OUT FIFO
Endpoint2
Endpoint3
Endpoint4
(not available)
P
a
Endpoint3 OUT FIFO
P
a
i
i
r
r
e
d
Endpoint4 OUT FIFO
e
d
Endpoint3
Endpoint4
(not available)
AI10494
Reading and writing FIFOs
There are a total of ten 64-byte FIFOs. Each of the five Endpoints has two FIFOs, one IN
FIFO for IN transactions and one OUT FIFO for OUT transactions. The FIFOs are
accessible by the CPU through a 64-byte segment in the XDATA space when the VISIBLE
Bit is set (see Table 80 on page 163). If the VISIBLE Bit is not set, the FIFOs are not
accessible by the CPU but are still accessible by the SIE. The base address of the 64-byte
segment is specified by the USB Base Address High Register (see Table 85 on page 168)
and the USB Base Address Low Register (see Table 86 on page 168). When the VISIBLE
Bit is set, the FIFO that is accessible in the 64-byte XDATA space segment is the FIFO
selected by the USEL register. The USEL register contains two fields used for selecting the
accessible FIFO. The EP field determines the Endpoint selected and the DIR Bit selects the
IN or OUT FIFO associated with the Endpoint.
Accessing FIFO control registers, UCON, and USIZE
Each of the 10 Endpoint FIFOs has an associated USB Endpoint Control Register (UCON,
0F1H) and a USB FIFO Valid Size Register (USIZE, 0F2H). The USB Endpoint Select
Register (USEL) is not only used to select the Endpoint FIFO that is accessible in the
XDATA space, but also selects the associated Endpoint’s UCON and USIZE registers that
are accessible at SFR addresses 0F1H and 0F2H.
Accessing the setup command buffer
Setup Packets are sent from the host to a device’s Endpoint0 and consist of 8 bytes of
command data. When the SIE receives a Setup packet from the host, it stores the 8 bytes of
data in the Command Buffer. The command buffer is accessed via the indexed USB Setup
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