UPSD3422_06 Datasheet, PDF (30/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

8032 MCU registers
uPSD34xx
7.7.6
by-zero condition. The OV flag is cleared by the ADD, ADDC, SUBB, MUL, and DIV
instructions in all other cases. The CLRV instruction will clear the OV flag at any time.
Parity flag (P)
The P flag is set if the sum of the eight bits in the Accumulator is odd, and P is cleared if the
sum is even.
Table 4.
RS1
0
0
1
1
.Register bank select addresses
RS0
Register Bank
0
0
1
1
0
2
1
3
8032 Internal DATA Address
00h - 07h
08h - 0Fh
10h - 17h
18h - 1Fh
Figure 12. Program status word (PSW) register
MSB
PSW ^{CY AC FO RS1 RS0 OV}
Carry Flag
Auxillary Carry Flag
General Purpose Flag
LSB
P _{Reset Value 00h}
Parity Flag
Bit not assigned
Overflow Flag
Register Bank Select Flags
(to select Bank0-3)
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