UPSD3422_06 Datasheet, PDF (275/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

uPSD34xx
DC and AC parameters
Figure 103. Asynchronous RESET / Preset
tARPW
RESET/PRESET
INPUT
REGISTER
OUTPUT
tARP
AI02864
Figure 104. Asynchronous Clock Mode Timing (Product Term Clock)
tCHA
tCLA
CLOCK
tSA tHA
INPUT
REGISTERED
OUTPUT
tCOA
AI02859
Table 169. CPLD macrocell asynchronous clock mode timing (5V PSD module)
Symbo
l
Parameter
Conditions Min
Max
PT
Aloc
Turbo
Off
Slew
Rate
Unit
Maximum Frequency
External Feedback
1/(t_SA+t_COA)
f_MAXA
Maximum Frequency
Internal Feedback (f_CNTA)
Maximum Frequency
Pipelined Data
1/(t_SA+t_COA–
10)
1/(t_CHA+t_CLA)
t_SA
t_HA
t_CHA
t_CLA
t_COA
t_ARDA
t_MINA
Input Setup Time
Input Hold Time
Clock Input High Time
Clock Input Low Time
Clock to Output Delay
CPLD Array Delay
Minimum Clock Period
7
8
9
9
Any macrocell
1/f_CNTA
16
38.4
MHz
62.5
MHz
71.4
MHz
+ 2 + 10
ns
ns
+ 10
ns
+ 10
ns
21
+ 10 – 2 ns
11 + 2
ns
ns
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