UPSD3422_06 Datasheet, PDF (126/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

I²C interface
uPSD34xx
Table 60. Number of I²C bus samples taken after 1-to-0 transition on SDA (START
Condition)
Contents of S1SETUP
SS_EN bit
SMPL_SET[6:0]
Resulting value for
S1SETUP
Resulting Number of
Samples Taken After 1-to-0
on SDA Line
0
XXXXXXXb
00h (default)
1
1
0000000b
80h
1
1
0000001b
81h
2
1
0000010b
82h
3
...
...
...
...
1
0001011b
8Bh
12
1
0010111b
97h
24
...
...
...
...
1
1111111b
FFh
128
Table 61. Start condition hold time
I²C Bus Speed
Range of I²C Clock Speed
(f_SCL)
Standard
Up to 100KHz
Fast
High
101KHz to
400KHz
401KHz to 833KHz⁽¹⁾
Minimum START Condition
Hold Time (t_HLDSTA)
4000ns
600ns
160ns
Note: 1 833KHz is maximum for uPSD34xx devices.
Table 62 provides recommended settings for S1SETUP based on various combinations of
f_OSC and f_SCL. Note that the “Total Sample Period” times in Table 61 on page 126 are
typically slightly less than the minimum START condition hold time, t_HLDSTA for a given I²C
bus speed.
Important note: The SCL bit rate f_SCL must first be determined by bits CR[2:0] in the SFR
S1CON before a value is chosen for SMPL_SET[6:0] in the SFR S1SETUP.
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