UPSD3422_06 Datasheet, PDF (164/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic

USB interface
uPSD34xx
● USB Endpoint0 Status (USTA)
The USB Endpoint0 Status register (see Table 81) provides the status for events that
occur on the USB that are directed to endpoint0.
Table 81.
Bit 7
–
USB endpoint0 status (USTA 0EDh, reset value 00h)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
–
–
–
RCVT
SETUP
Bit 1
IN
Bit 0
OUT
Bit
Symbol
R/W
Definition
7
–
–
Reserved
6
–
–
Reserved
5
–
–
Reserved
4
–
–
Reserved
Received Data Toggle Bit
This bit indicates the toggle bit of the received data packet:
3
RCVT
R
0 = Data0, and
1 = Data1
SETUP Token Detect Bit
This bit is set when Endpoint0 receives a SETUP token. This
2
SETUP
R/W bit is not cleared when Endpoint0 receives an IN or OUT token
following the SETUP token that set this bit. This bit is cleared
by software or a reset.
IN Token Detect Bit
1
IN
R
This bit is set when Endpoint0 receives an IN token. This bit is
cleared when Endpoint0 receives a SETUP or OUT token.
OUT Token Detect Bit
0
OUT
R
This bit is set when Endpoint0 receives an OUT token. This bit
is cleared when Endpoint0 receives a SETUP or IN token.
Important note: Disabling and enabling the USB SIE using the USBEN bit in the UCTL
register clears the RCVT, IN, and OUT bits in this register.
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