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UPSD3422_06 Datasheet, PDF (141/293 Pages) STMicroelectronics – Turbo Plus Series Fast Turbo 8032 MCU with USB and Programmable Logic
uPSD34xx
SPI (synchronous peripheral interface)
Table 64.
Bit 7
–
SPICON1: SPI interface control register 1 (SFR D7h, reset value 00h)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
–
–
–
TEIE
RORIE
TIE
RIE
Bit
Symbol
R/W
Definition
7-4
–
–
Reserved
Transmission End Interrupt Enable
3
TEIE
RW 0 = Disable Interrupt for Transmission End
1 = Enable Interrupt for Transmission End
Receive Overrun Interrupt Enable
2
RORIE
RW 0 = Disable Interrupt for Receive Overrun
1 = Enable Interrupt for Receive Overrun
Transmission Interrupt Enable
1
TIE
RW 0 = Disable Interrupt for SPITDR empty
1 = Enable Interrupt for SPITDR empty
Reception Interrupt Enable
0
RIE
RW 0 = Disable Interrupt for SPIRDR full
1 = Enable Interrupt for SPIRDR full
Table 65.
Bit 7
DIV128
SPICLKD: SPI prescaler (clock divider) register (SFR D2h, reset value
04h)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DIV64
DIV32
DIV16
DIV8
DIV4
–
–
Bit
Symbol
R/W
Definition
0 = No division
7
DIV128
RW
1 = Divide fOSC clock by 128
0 = No division
6
DIV64
RW
1 = Divide fOSC clock by 64
0 = No division
5
DIV32
RW
1 = Divide fOSC clock by 32
0 = No division
4
DIV16
RW
1 = Divide fOSC clock by 16
0 = No division
3
DIV8
RW
1 = Divide fOSC clock by 8
0 = No division
2
DIV4
RW
1 = Divide fOSC clock by 4
1-0
Not Used
–
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