HD64F3644PV Datasheet, PDF (67/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 2 CPU
2.6.2 Access to On-Chip Peripheral Modules
On-chip peripheral modules are accessed in two states or three states. The data bus width is 8 bits,
so access is by byte size only. This means that for accessing word data, two instructions must be
used.
Two-State Access to On-Chip Peripheral Modules: Figure 2.12 shows the operation timing in
the case of two-state access to an on-chip peripheral module.
φ or φ _SUB
Bus cycle
T₁ state
T₂ state
Internal address bus
Address
Internal read signal
Internal data bus
(read access)
Read data
Internal write signal
Internal data bus
(write access)
Write data
Figure 2.12 On-Chip Peripheral Module Access Cycle (2-State Access)
Rev. 6.00 Sep 12, 2006 page 45 of 526
REJ09B0326-0600