HD64F3644PV Datasheet, PDF (53/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 2 CPU
2.5.1 Data Transfer Instructions
Table 2.4 describes the data transfer instructions. Figure 2.5 shows their object code formats.
Table 2.4 Data Transfer Instructions
Instruction
MOV
Size^*
B/W
POP
W
PUSH
W
Function
(EAs) → Rd, Rs → (EAd)
Moves data between two general registers or between a general
register and memory, or moves immediate data to a general register.
The Rn, @Rn, @(d:16, Rn), @aa:16, #xx:16, @–Rn, and @Rn+
addressing modes are available for word data. The @aa:8 addressing
mode is available for byte data only.
The @–R7 and @R7+ modes require a word-size specification.
@SP+ → Rn
Pops a general register from the stack. Equivalent to MOV.W @SP+,
Rn.
Rn → @–SP
Pushes general register onto the stack. Equivalent to MOV.W Rn,
@–SP.
Notes: * Size: Operand size
B: Byte
W: Word
Certain precautions are required in data access. See section 2.9.1, Notes on Data Access, for
details.
Rev. 6.00 Sep 12, 2006 page 31 of 526
REJ09B0326-0600