HD64F3644PV Datasheet, PDF (293/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 Timers
Register Configuration
Table 9.20 shows the register configuration of the watchdog timer.
Table 9.20
Watchdog Timer Registers
Name
Abbr.
R/W
Timer control/status register W
TCSRW
R/W
Timer counter W
TCW
R/W
Initial Value
H'AA
H'00
Address
H'FFBE
H'FFBF
9.6.2 Register Descriptions
Timer Control/Status Register W (TCSRW)
Bit
7
6
5
4
3
2
1
0
B6WI TCWE B4WI TCSRWE B2WI WDON B0WI WRST
Initial value
Read/Write
1
0
1
0
1
0
1
0
R
R/(W)^*
R
R/(W)^*
R
R/(W)^*
R
R/(W)^*
Note: * Write is permitted only under certain conditions, which are given in the descriptions of
the individual bits.
TCSRW is an 8-bit read/write register that controls write access to TCW and TCSRW itself,
controls watchdog timer operations, and indicates operating status.
Bit 7Bit 6 Write Inhibit (B6WI): Bit 7 controls the writing of data to bit 6 in TCSRW.
This bit is always read as 1. Data written to this bit is not stored.
Bit 7: B6WI
0
1
Description
Bit 6 is write-enabled
Bit 6 is write-protected
(initial value)
Bit 6Timer Counter W Write Enable (TCWE): Bit 6 controls the writing of data to bit 8 to
TCW.
Bit 6: TCWE
0
1
Description
Data cannot be written to TCW
Data can be written to TCW
(initial value)
Rev. 6.00 Sep 12, 2006 page 271 of 526
REJ09B0326-0600