HD64F3644PV Datasheet, PDF (221/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8.9 Port 9
8.9.1 Overview
Port 9 is a 5-bit I/O port, configured as shown in figure 8.8.
Section 8 I/O Ports
Port 9
P9 ₄
P9 ₃
P9 ₂
P9 ₁
P9 ₀*
Note: * There is no P9₀ function in the flash memory version since P9₀ is used as the FV_PP pin.
Figure 8.8 Port 9 Pin Configuration
8.9.2 Register Configuration and Description
Table 8.23 shows the port 9 register configuration.
Table 8.23 Port 9 Registers
Name
Port data register 9
Port control register 9
Abbr.
R/W
PDR9
R/W
PCR9
W
Initial Value
H'C0
H'C0
Address
H'FFDC
H'FFEC
Port Data Register 9 (PDR9)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0



P94
P93
P92
P91
P90^*3
1^*1
1^*1
0^*2
0
0
0
0
0



R/W
R/W
R/W
R/W
R/W
Notes: 1. Bits 7 to 6 are reserved; they are always read as 1 and cannot be modified.
2. Bit 5 is reserved; it is always read as 0 and cannot be modified.
3. In the on-chip flash memory version, this bit is always read as 0 and cannot be
modified.
Rev. 6.00 Sep 12, 2006 page 199 of 526
REJ09B0326-0600