HD64F3644PV Datasheet, PDF (135/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

6.4.4 Block Diagram
Figure 6.6 shows a block diagram of the flash memory.
Section 6 ROM
8
Internal data bus (upper)
8
Internal data bus (lower)
FLMCR
Bus interface/control section
EBR1
EBR2
H'0000
H'0002
H'0004
H'0001
H'0003
H'0005
On-chip flash memory (32 kbytes)
H'7FFC
H'7FFE
Upper byte
(even address)
H'7FFD
H'7FFF
Lower byte
(odd address)
Legend:
FLMCR: Flash memory control register
EBR1: Erase block register 1
EBR2: Erase block register 2
Operating _TEST
mode
Figure 6.6 Block Diagram of Flash Memory (Example of the H8/3644F)
Rev. 6.00 Sep 12, 2006 page 113 of 526
REJ09B0326-0600