HD64F3644PV Datasheet, PDF (202/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 8 I/O Ports
8.4 Port 3
8.4.1 Overview
Port 3 is a 8-bit I/O port, configured as shown in figure 8.3.
Port 3
P3 ₂ /SO ₁
P3 ₁ /SI₁
P3 ₀ /SCK₁
Figure 8.3 Port 3 Pin Configuration
8.4.2 Register Configuration and Description
Table 8.8 shows the port 3 register configuration.
Table 8.8 Port 3 Registers
Name
Abbr.
R/W
Port data register 3
PDR3
R/W
Port control register 3
PCR3
W
Port pull-up control register 3
PUCR3
R/W
Port mode register 3
PMR3
R/W
Port mode register 7
PMR7
R/W
Initial Value
H'00
H'00
H'00
H'00
H'F8
Address
H'FFD6
H'FFE6
H'FFEE
H'FFFD
H'FFFF
Port Data Register 3 (PDR3)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0





P32
P31
P30
0^*
0^*
0^*
0^*
0^*
0
0
0





R/W
R/W
R/W
Note: * Bits 7 to 3 are reserved; they are always read as 0 and cannot be modified.
PDR3 is an 8-bit register that stores data for port 3 pins P3₂ to P3₀. If port 3 is read while PCR3
bits are set to 1, the values stored in PDR3 are read, regardless of the actual pin states. If port 3 is
read while PCR3 bits are cleared to 0, the pin states are read.
Rev. 6.00 Sep 12, 2006 page 180 of 526
REJ09B0326-0600