HD64F3644PV Datasheet, PDF (286/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 9 Timers
9.5.7 Timer X Application Example
Figure 9.31 shows an example of the output of pulse signals with a 50% duty cycle and arbitrary
phase offset. To set up this output:
• Set bit CCLRA to 1 in TCSRX.
• Have software invert the OLVLA and OLVLB bits at each corresponding compare match.
H'FFFF
OCRA
OCRB
H'0000
FTOA
FRC
Counter cleared
FTOB
Figure 9.31 Pulse Output Example
Rev. 6.00 Sep 12, 2006 page 264 of 526
REJ09B0326-0600