HD64F3644PV Datasheet, PDF (302/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 Serial Communication Interface
Bits 7 and 6Operation Mode Select 1, 0 (SNC1, SNC0): Bits 7 and 6 select the operation
mode.
Bit 7: SNC1
Bit 6: SNC0
Description
0
0
8-bit synchronous transfer mode
1
16-bit synchronous transfer mode
1
0
Continuous clock output mode^*1
1
Reserved^*2
Notes: 1. Pins SI1 and SO1 should be used as general input or output ports.
2. Don’t set bits SNC1 and SNC0 to 11.
(initial value)
Bits 5TAIL MARK Control (MRKON): Bit 5 controls TAIL MARK output after an 8- or 16-
bit data transfer.
Bit 5: MRKON
0
1
Description
TAIL MARK is not output (synchronous mode)
TAIL MARK is output (SSB mode)
(initial value)
Bits 4LATCH TAIL Select (LTCH): Bit 4 selects whether LATCH TAIL or HOLD TAIL is
output as TAIL MARK when bit MRKON is set to 1 (SSB mode).
Bit 4: LTCH
0
1
Description
HOLD TAIL is output
LATCH TAIL is output
(initial value)
Bit 3Clock Source Select (CKS3): Bit 3 selects the clock source and sets pin SCK₁ as an input
or output pin.
Bit 3: CKS3
0
1
Description
Clock source is prescaler S, and pin SCK1 is output pin
Clock source is external clock, and pin SCK1 is input pin
(initial value)
Rev. 6.00 Sep 12, 2006 page 280 of 526
REJ09B0326-0600