HD64F3644PV Datasheet, PDF (469/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

TIER—Timer interrupt enable register
Appendix B Internal I/O Registers
H'F770
Timer X
Bit
7
6
5
4
3
2
1
0
ICIAE ICIBE ICICE ICIDE OCIAE OCIBE OVIE
—
Initial value
0
0
0
0
0
0
0
1
Read/Write
R/W
R/W
R/W
R/W R/W
R/W
R/W
—
Timer overflow interrupt enable
0 Interrupt request (FOVI) by OVF is disabled
1 Interrupt request (FOVI) by OVF is enabled
Output compare interrupt B enable
0 Interrupt request (OCIB) by OCFB is disabled
1 Interrupt request (OCIB) by OCFB is enabled
Output compare interrupt A enable
0 Interrupt request (OCIA) by OCFA is disabled
1 Interrupt request (OCIA) by OCFA is enabled
Input capture interrupt D enable
0 Interrupt request (ICID) by ICFD is disabled
1 Interrupt request (ICID) by ICFD is enabled
Input capture interrupt C enable
0 Interrupt request (ICIC) by ICFC is disabled
1 Interrupt request (ICIC) by ICFC is enabled
Input capture interrupt B enable
0 Interrupt request (ICIB) by ICFB is disabled
1 Interrupt request (ICIB) by ICFB is enabled
Input capture interrupt A enable
0 Interrupt request (ICIA) by ICFA is disabled
1 Interrupt request (ICIA) by ICFA is enabled
Rev. 6.00 Sep 12, 2006 page 447 of 526
REJ09B0326-0600