HD64F3644PV Datasheet, PDF (44/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 2 CPU
2.3.2 Memory Data Formats
Figure 2.4 indicates the data formats in memory. For access by the H8/300L CPU, word data
stored in memory must always begin at an even address. When word data beginning at an odd
address is accessed, the least significant bit is regarded as 0, and the word data beginning at the
preceding address is accessed. The same applies to instruction codes.
Data Type
Address
Data Format
1-bit data
7
0
Address n 7 6 5 4 3 2 1 0
Byte data
Address n MSB
LSB
Word data ^{Even address MSB}
Upper 8 bits
Odd address
Lower 8 bits
LSB
Byte data (CCR) on stack ^{Even address MSB}
CCR
LSB
Odd address MSB
CCR^*
LSB
Word data on stack ^{Even address MSB}
Odd address
LSB
Legend:
CCR: Condition code register
Note: * Ignored on return
Figure 2.4 Memory Data Formats
When the stack is accessed using R7 as an address register, word access should always be
performed. The CCR is stored as word data with the same value in the upper 8 bits and the lower 8
bits. On return, the lower 8 bits are ignored.
Rev. 6.00 Sep 12, 2006 page 22 of 526
REJ09B0326-0600