HD64F3644PV Datasheet, PDF (214/551 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 8 I/O Ports
8.6.4 Pin States
Table 8.16 shows the port 6 pin states in each operating mode.
Table 8.16 Port 6 Pin States
Pins
Reset
Sleep Subsleep Standby Watch Subactive Active
P67 toP60
High-
Retains Retains
impedance previous previous
state
state
High-
Retains Functional Functional
impedance^* previous
state
Note: * A high-level signal is output when the MOS pull-up is in the on state.
8.7 Port 7
8.7.1 Overview
Port 7 is a 8-bit I/O port, configured as shown in figure 8.6.
Port 7
P7₇
P7₆/TMOV
P7₅/TMCIV
P7₄/TMRIV
P7₃
Figure 8.6 Port 7 Pin Configuration
8.7.2 Register Configuration and Description
Table 8.17 shows the port 7 register configuration.
Table 8.17 Port 7 Registers
Name
Port data register 7
Port control register 7
Abbr.
R/W
PDR7
R/W
PCR7
W
Initial Value
H'00
H'00
Address
H'FFDA
H'FFEA
Rev. 6.00 Sep 12, 2006 page 192 of 526
REJ09B0326-0600